1. Field of the Invention
The present invention relates generally to switching systems. More specifically, the present invention relates to a switching system which provides the ability to interconnect a large number of electronic components in a manner which allows the components to function as if they were physically wired together using virtually any type of data transfer protocol while exhibiting low latency (achieving a total data transfer delay close to the that which would have been achieved in a direct-wired configuration), timing consistency (achieving a latency which is deterministic and predictable), and high signal fidelity (not adding to, deleting from, or altering the signal in any way).
2. Glossary
Before beginning a discussion of either the related art or the preferred embodiments according to the present invention, it should be mentioned that the inventors have opted to employ the following terms throughout the specification. A glossary of these terms are set out immediately below.
Blockingxe2x80x94Blocking refers to a condition wherein a connection is refused even though there are free input and output channels.
Contentionxe2x80x94refers to an attempt to connect an input port to an output port which is already in use.
Data Transfer Protocol Insensitivexe2x80x94Data transfer protocol insensitive functional behavior refers to the ability to of the switching system to handle virtually any type of data transfer protocol, i.e., any device can be connected to any other device that uses that same data transfer protocol, without adding to, deleting from, altering, or responding to the transfer protocol in any way. From the discussion immediately above, it will be appreciated that neither the origin nor the destination of any signal is determined by analyzing the associated header or the data content of the signal; switching is completely content-independent or message-independent.
Deliverxe2x80x94Deliver, as used hereinafter, is employed to connote that any specification-compliant signal received is switched and xe2x80x9cdeliveredxe2x80x9d as a corresponding specification-compliant output signal. xe2x80x9cDeliveredxe2x80x9d is understood to be broad enough to encompass the general process wherein the input signal, once recognized as a valid signal, is converted into one or more other signal formats as it is handled within the switch, so long as the final output signal xe2x80x9cdeliveredxe2x80x9d by the MIPPSS is specification-compliant in its original format.
Distributed Systemxe2x80x94Distributed system refers to the switching system design wherein each switching unit has the capability of servicing multiple locations, and no single location must house the entire switch. It will be appreciated that this reduces need for costly modifications or additions to facilities to accommodate switching equipment.
Hot-Swappingxe2x80x94Hot-swapping capability refers to the ability to perform on-line replacement of line-replaceable units, i.e., the switching system remains operable overall while discrete, inoperable elements are replaced.
Low Latencyxe2x80x94Low latency refers to the ability of the switching system to achieve a total data transfer delay close to the that which would have been achieved in a direct-wired configuration.
Multi-Interfacexe2x80x94Multi-Interface functional behavior refers to the ability to handle virtually any type of data transfer protocol, i.e., any device can be connected to any other device that uses that same data transfer protocol.
NTDSxe2x80x94Naval Tactical Data System (NTDS) refers to the Navy""s specific implementation of the Military Standard Document entitled xe2x80x9cInput/Output Interfaces, Standard Digital Data, Navy Systems,xe2x80x9d commonly referred to as MIL-STD-1397 (NAVY). The standard describes interface classifications (Types) and categories of NTDS interfaces, the latter being parallel interfaces, serial interfaces, and other interfaces. For specific information of each NTDS signal type, refer to MIL-STD-1397 (NAVY), the latest version of which, MIL-STD-1397C, is available from the Naval Publications and Forms Center, Philadelphia, Pa., or at http://www.dodssp.daps.mil. MIL-STD-1397 is incorporated herein by reference.
Point-to-Multipointxe2x80x94Point-to-multipoint functional behavior refers to the ability by which a single data generating device (root node) communicates with a plurality of data receiving devices (leaf nodes). In nodal notation, traffic on the switching system is generated by the root node and received by all of the leaf nodes. Moreover, the switching system does not reserve bandwidth for traffic from any of the leaf nodes toward the root node and the leaf nodes cannot communicate with one another through the point-to-multipoint connection. A switching system capable of point-to-multipoint connections is said to include a broadcast capability.
Point-to-Pointxe2x80x94Point-to-point functional behavior generally refers to the ability to connect devices which are required to communicate with one another on a one-to-one basis.
Signal Fidelityxe2x80x94Signal fidelity refers to the ability to replicate the input signal at the output port. High signal fidelity denotes that the signal is delivered without adding to, deleting from, or altering the signal in any way.
Switch Fabricxe2x80x94The components with a switching system that provides paths for the connections. In the discussion which follows, two distinct types of switch fabrics will be considered. The first type is multi-layer switch fabric, where the switch fabric is arranged in layers, i.e., discrete switch enclosures, according to the signal format the individual layers are designed to receive and/or output. The second type is mixed-layer switch fabric, wherein multiple signal formats are received and/or output by a single switch layer, e.g., a single switch enclosure.
Timing Consistencyxe2x80x94Timing consistency refers to the ability of the switching system to achieve a latency which is deterministic and predictable. See low latency.
Transparencyxe2x80x94Transparent functional behavior refers to the ability to deliver a signal without interaction with the interface protocol corresponding to that signal. Thus, an interface-compliant input signal bit arriving at an input terminal is output as an interface-compliant signal bit, irrespective of whether the bit is a control bit or a data bit. This characteristic is critical when the switch serves to connect objects which are themselves under test, allowing research and testing without introducing additional possible sources of errors due to switching.
3. Brief Discussion of Related Art
The primary utility of MIPPSS is in transparently switching signals between and among components which may not have been originally designed to be switched. The signals can be of virtually any data type (communications, images, sensor data, accounting records) and can be used for any scientific, commercial, or military purpose. See FIG. 1.
The discussion immediately below provides a review of basic digital communications. In addition, the discussion outlines the need for switching, current methods and apparatus used to perform switching, and the principal limitations and disadvantages of these methods. Several solutions to the overall switching problem solved by MIPPSS are also discussed.
Digital equipment communicates by sending digital signals, which are composed of binary digits, or bits. Each bit represents either a 1 (one) or a 0 (zero). FIG. 2 shows a representative bit expressed as a deflection from a baseline over a period of time. By convention, most upward deflections are signed positive. The presence of a 1 or a 0 is interpreted according to an agreed-upon encoding technique, as described in greater detail below, but it should be noted here that the presence of a 1 or a 0 may be denoted by positive or negative deflections, positive or negative transitions, or simply by the presence or absence of a transition. Digital signaling is generally superior to analog information transfer because it is capable of very accurate transmission over great distances.
It will be appreciated that the bit is signaled in a digital circuit by varying voltages. The most common digital logic, transistor-transistor logic (TTL), uses +0.5 volts nominal for a low signal and +5 volts nominal for a high signal. A faster logic, emitter-coupled logic (ECL), uses xe2x88x921.75 volts nominal for low and xe2x88x920.9 volts nominal for high. Positive Emitter-Coupled Logic (PECL) uses nominal +3.0 volts for low and +4.0 volts for high.
It should be mentioned here that when the signal needs to be transmitted over a distance, a device called a driver receives the digital logic input, adds energy, and produces a current sufficient to transmit the signal. However, regardless of the propagation distance, it is important to note that the shape of the signal bit may vary in terms of its overall amplitude, duration, and direction of deflection (polarity). The allowable limits on the exact shape of signal bits are precisely defined in interface specifications. This precise definition helps to ensure that noise is not interpreted as data.
The transmission of digital data from one machine to another must ensure that the data is received unambiguously and accurately. Various encoding techniques are used depending on the requirements of the interface (distance, timing, environment, etc.). Some common forms of encoding are illustrated in FIG. 3 and include:
a. Return to Zero (RZ). A simple approach to digital communication might prescribe an upward deflection to signal the presence of a 1 bit, and the absence of this deflection to signal a 0 bit (FIG. 3(a)). In this case it takes an entire time interval, or bit period (shown as the horizontal distance between the vertical grid lines) to signal a 0, not simply the return to baseline which occurs following each 1 bit. This interpretation requires some type of timing signal to coordinate bit periods between different equipment.
b. Non-Return-to-Zero (NRZ). In FIG. 3(b), a continuous signal might transmit at either one level or another throughout each time interval, eliminating the need for a return to baseline within each interval. Again, some form of time synchronization is required.
c. Manchester. An improvement to these signaling schemes uses just a down-shift to signal a 1 and an up-shift to signal a 0 (FIG. 3(c)). This shift must occur in the middle of the bit period for the signal to be valid.
d. Non-Return-to-Zero, Inverted (NRZI). A further refinement defines that simply a transition across the time interval boundary indicates a 0 and the lack of a similar transition indicates a 1 (FIG. 3(d)).
Each of these encoding methods has distinct advantages and disadvantages in aspects such as overall signaling speed, average power consumed, error rates, and the need for a separate clock.
It should be mentioned that encoding is performed to enable data transfer and not to provide secrecy. It will also be understood that distinct strings of bits may be encoded to represent letters and words. Once again, the goal of these codes is not secrecy but the establishment of distinct and unambiguous meanings for various bit patterns. Two of the more common encoding schemes are as follows:
a. ASCII. One common encoding scheme is ASCII, the American Standard Code for Information Interchange, published by the American National Standards Institute. ASCII uses a seven-bit string to signal different English alphanumeric characters. The use of seven bits limits the character set to 27=128 different characters.
b. EBCDIC. IBM increased the number of possible characters to 256 by using an eight-bit coding system known as the Extended Binary Coded Decimal Interchange Code (EBCDIC). Representative values of these codes are shown in Table 1.
Other data processing systems use different binary coding systems with different numbers of bits, sometimes adding extra bits for error detection/correction.
It should be noted that digital signals may be transmitted between two communicating components via single- or multiple-conductor electrical (or fiber optic) cables. In order to communicate, sending and receiving components must agree upon the format of the signals they exchange. Common signal formats include serial (one bit at a time over a single conductor) and parallel (several bits at a time over multiple-conductor cables). See FIG. 4. It will be appreciated that fiber optic transmission usually involves a serial-format transmission over a fiber optic cable.
Although all signals are bound by the physical limit on transmission speed in any particular medium (and none can exceed the speed of light), signal formats may differ in how frequently they inject or extract data on the communication channel, as defined in their interface specifications. Numerous private, public, and international interface standards exist. Interface standards also include timing considerations and descriptions of associated control signals, such as xe2x80x9cready to send,xe2x80x9d xe2x80x9cready to receive,xe2x80x9d etc.
Other standards allow for more complex manipulations of data. It is possible (and commonly practiced) to inject multiple signals on a single communication channel by subdividing time intervals or frequency bands on the communication channel; this technique is generally known as multiplexing. It should also be mentioned that another increasingly common signal manipulation is data compression and decompression according to specific algorithms.
Most modern technical, commercial, and scientific activities simultaneously use a wide variety of digital data sending and receiving devices. These devices include not only computers, but an increasing number of peripherals which now generate digital data such as medical imaging equipment, radars, and voice communications systems. The wide variety of these systems is further increased by the fact that different systems are bought over time, each differing slightly from previous models. Interoperability is highly desirable in order to take advantage of still-useful equipment (collectively known as legacy systems).
The physical and electrical arrangement of components within any facility usually is not permanently fixed. Components are taken off-line for maintenance or repair, new components are added, and old components are removed. Activity missions frequently change, and data processing resources are re-aligned according to the task at hand, sometimes on an hourly basis. For example, a large financial institution may choose to re-align resources to perform end-of-month invoice processing. In contrast, a military facility may choose to disconnect external communication devices in order to process classified data. It is usually cost prohibitive to purchase multiple equipment suites with overlapping capabilities to perform different missions. Realigning resources is more cost effective.
In order to realign components in response to mission changes, i.e., changes in facility usage, the activity may choose to unplug components and re-route the associated cables. Dozens of devices with dozens of input-output (I/O) channels each implies hundreds or potentially thousands of cables. These cables are frequently in crowded under-floor spaces or cable trays, and may need to be cut, spliced, and/or re-manufactured to fit new routes.
Switching is the most cost-effective method for realigning resources. A multiple-interface switch allows an activity to interconnect a wide variety of components while avoiding the need to manually re-route cables. In the discussion which follows, it should be assumed that the overall switching system design requirement specifies point-to-point switching unless the discussion states otherwise.
The most common type of a switch is a mechanical switch. Original point-to-point electrical signal switching equipment included simple multi-pole mechanical switches used for early telegraphy, and patch cables used by operators on early telephone systems. FIG. 5 illustrates a simple single-pole, dual-throw (SPDT) switch. Variants of mechanical signal switches still exist in many modem buildings. For example, although FIG. 5 shows a single communication line on the input side, multi-conductor (i.e., parallel) switches are common. Mechanical switches provide a rugged, relatively inexpensive point-to-point switch path. Mechanical switches are useful where rapid or frequent equipment realignments are not required, or for distributing analog (non-digital) signals such as radar and/or video signals. Because these switches involve mechanical moving parts and contacts, they require periodic maintenance, they are subject to wear and tear, and they are susceptible to eventual failure. Mechanical switches can be remotely controlled (opened and closed) using electrical remote control circuits. In general, mechanical switches are useful in small-scale applications with a limited number of destinations and where limited growth is expected.
It will be appreciated that additional destination poles can be added. Such switches are generally referred to as 1xc3x97n or multi-pole switches (where n represents the number of available destinations). They include T-Bar Corporation""s T-Bar switches and Purvis Corporation""s MultiPort switches. These are depicted schematically in FIG. 6. Notice that it is possible to gang these switches to achieve an increased value of n; FIG. 6 shows an effective 1xc3x973 switch achieved by splitting one of the outputs of the first 1xc3x972 switch. Multi-pole switches up to 1xc3x978 are commonly available.
Another common switch type is a crosspoint switch. It should be mentioned that early crosspoint switches were implemented via a relay design by the Bell Telephone Company for their telephone switching centers. These switches have mostly been replaced by solid state crosspoint switches. Moreover, an electric path between multiple inputs and multiple outputs can be effected using solid-state technology known as crosspoint switching. At the highest level, these electronic switches appear as nxc3x97m switches, as shown in FIG. 7. These switches may also be commonly referred to as matrix switches. Examples include the Navy""s High-Speed Digital Switch (HSDS)(AN/USQ-62(V)) and Low-Level Serial (LLS) Switch (AN/FSQ-157(V)). HSDS is implemented in several Navy sites in either 256xc3x97256 or 1024xc3x971024 configurations. Integrated crosspoint switch circuit elements containing 32xc3x9732 switches on a single chip are common. Symmetry is not required; a 64xc3x9733 crosspoint switch provides 64 inputs and only 33 possible outputs.
Referring to FIG. 7, it should be noted that although the lines appear to lay across each other and therefore electrically connect, the connection is actually controlled by an AND gate which provides a method for external control. See FIG. 8. An AND Gate is a logical device whose output is 1 only when both inputs are 1. Lacking a 1 signal on the control line, the AND gate will not produce an output and the crosspoint is not connected. It will be appreciated that reconfigurable crosspoint switches require less switch allocation planning than mechanical switches and consume fewer resources per switched channel than mechanical switches, especially when mechanical switches must be ganged.
A variant of the conventional crosspoint switch is the minimized crosspoint switch. The principal problem with crosspoint switches is that the number of required crosspoints grows as the square of the number of input lines. In FIG. 7 above, the simple crosspoint switch for eight input channels and eight output channels requires 8xc3x978, or 64 crosspoints. A simple 100-channel switch requires 10,000 crosspoints, and each crosspoint requires a separate control line. This number can be dramatically reduced by eliminating self-connections and assuming bidirectional (full duplex) communications. FIG. 9 illustrates the eliminated crosspoints within the shaded area achievable using a minimized crosspoint switch. The general equation for the number of required crosspoints in a minimized crosspoint switch with n inputs is:
Minimum number of crosspoints=n (nxe2x88x921)/2xe2x80x83xe2x80x83(1)
The number of physical switches needed to provide, for example, sixteen signal paths can also be minimized by the use of multi-stage switching. Stated another way, crossbar switch size and complexity can be reduced by using intermediate stages. FIG. 10 shows a multi-stage switch (also known as a space division switch). In the exemplary multi-stage switch illustrated in FIG. 10, a virtual Nxc3x97N (16xc3x9716) switch has been created using four 4xc3x972 input crossbars, two 4xc3x974 intermediate stage crossbars, and four 2xc3x974 output crossbars. Instead of having the 16xc3x9716=256 crosspoints of a simple crosspoint switch, or the n(nxe2x88x921)/2=120 crosspoints of a minimized crosspoint switch, this switch uses only 96 crosspoints. The general equation for the number of crosspoints is:
Number of crosspoints=2kN+k(N/n)2xe2x80x83xe2x80x83(2)
It should be mentioned here that although some reduction in complexity is achieved by staging, blocking is possible when there is contention for one of the intermediate stages. As mentioned above, blocking is a condition where a connection is refused because the switch assets are already being used to connect other devices. In FIG. 11, all eight available intermediate stage channels are used (shown by heavy lines with arrows), indicating that additional connections cannot be made, even though there are free input and output channels. It will be appreciated from equation (2) that adding additional intermediate stages will ease the bottleneck; when the number of intermediate stages (k) equals 2nxe2x88x921, the switch will not block, as noted by Clos in an article entitled xe2x80x9cA Study of Non-Blocking Switching Networks,xe2x80x9d which article appeared in Bell System Technical Journal, Volume 32, pp. 406-424, March 1953. It will also be appreciated that the decision whether or not to add intermediate stages is usually based on total cost, complexity, physical space, and performance requirements.
Referring now to FIGS. 12A and 12B, the concept behind a conventional trunk switch will now be discussed. Referring to FIG. 12A, the illustrated trunk cable provides a heavily loaded system a degree of flexibility by directly connecting ports on two different switches. It should be noted that trunk cables are used when the size of a switch becomes inadequate for user requirements or there are not enough switching assets close enough to the equipment channels which need to be switched. The use of trunk cables consumes available switching ports in static, unswitchable applications. FIG. 12B illustrates the use of a trunk switch. This type of switch is used to allow a path to equipment that is not directly accessible from another switch. Like trunk cables, the use of trunk switches is cost-prohibitive. Again, this type of switching arrangement usually is the result of expanding switching requirements beyond their intended maximum requirements.
Packet switching is a widely used alternative to point-to-point switching. Although communication via local and wide-area computer networks (LANs and WANs) has grown in popularity in the past several years, such networks do not offer a complete solution to the point-to-point switching problem. Most networks handle long-distance communications by using a process of packet switching in which larger messages are broken up into transmittable portions (packets), several layers of header data are added, and the message (data) proceeds through a series of intermediate destinations until its final destination is reached. FIG. 13 shows a typical packet switching network. Points A and M could represent opposite ends of an office (LAN) or offices in separate cities hundreds of miles apart (WAN).
It will be appreciated that data packets may be buffered (stored) until intermediate channels are available. Depending on the specific network technology selected, packets may follow different paths to the same destination, such as those shown by the heavier solid lines and the heavier dashed lines connecting A and M. This means that the packets may arrive out of order at the destination, or may simply be lost in transmission. The processor at the destination must collect and inventory packets, remove header data, and then re-assemble and verify the message. In addition, if the network is used by multiple participants, some form of contention arbitration scheme is required. Arbitration implies some form of selection, momentary storage, and delayed transmission of a packet.
Current switching technology has several limitations and disadvantages including:
a. Limited Capacity. Mechanical switches are not adequate for the sheer volume of switched interfaces in modem facilities; the amount of time and labor required to manually re-set a large number of switches is usually prohibitive and error-prone. Mechanical switches also require regular maintenance and are prone to failure;
b. Limited Interface Types. Crosspoint switches usually handle only one interface type (e.g., parallel or serial);
c. Complexity. While modem integrated circuit technology can accommodate thousands of crosspoints, connecting thousands of data and control conductors to a single chip is unreasonably complex and expensive as the number of data and control channels increases. Multi-stage switches allow the use of smaller but more numerous crosspoint switches, but at the cost of possible blocking. Adding sufficient intermediate stages to forestall blocking re-introduces design complexity;
d. Performance Inconsistency. Packet switching over LANs and WANs, while very useful for many purposes, is fundamentally not deterministic in large applications where dynamic traffic loads cause variations in routing, timing, and (in some architectures) possible losses of packets. This method of communication is therefore not useful in data transfer applications where the signal route and elapsed time must be consistent and predictable (such as when the computer system itself is under test);
e. Unmanageable Physical Components. Most current switching designs are not distributable. The physical arrangement of devices is bounded by both the speed of electrical signals and the ability to humanly manage the installation. Equipment layout considerations are further complicated by distance limitations imposed by line losses associated with any purely passive device. If the switch""s physical resources are not distributable, they may require a large amount of contiguous space in already crowded and expensive facilities; and
f. Procurement Challenges. A single switch of a given capacity, even if available and technically suitable, would most likely be difficult to acquire since the total switching needs of any facility are difficult to predict. A scalable design allows users to purchase adequate resources for current needs while leaving the option open for future system expansion in response to future system needs.
Alternative designs which use combinations of the current technology are also presently available. Several alternative designs are described immediately below. These descriptions also note the problem(s) associated with each alternative design. Table 2 below summarizes the disadvantages of the alternative designs.
Alternative Design No. 1 is simply a large matrix switch. See FIG. 14A. If both electrical and fiber optic signals are to be passed through the same switch, then some form of converters are required. The disadvantages of this design include cable congestion in and around the matrix switch, cable length limitations, and the physical size of the switch. Required converters would introduce a relatively high latency in electrical parallel and fiber optic paths.
Alternative Design No. 2 is a network approach, as illustrated in FIG. 14B. Once again, numerous conversions must be performed in order to access the network. The specific disadvantages of this design include timing inconsistencies, high latency (due to packetization, channel arbitration, and other network management overhead), and possible lost or out-of-order packets. A leading high-speed network transfer protocol, ATM (Asynchronous Transfer Mode), for example, does not guarantee packet delivery.
Alternative Design No. 3 calls for a mixed system of different types of switching, i.e., a multi-layer switch fabric. This is frequently the xe2x80x9creal worldxe2x80x9d system which has evolved in many facilities. As shown in FIG. 14C, this type of system uses several different switches, often of different types, to route signals between and among other serviced equipment and other switches. The switches shown may be matrix switches, mechanical switches, or fiber optic switches, each with its own conversion requirements. The major disadvantages of this system include very difficult logistics, making parts support and maintenance very costly and inefficient; inefficiencies in trunking (using up switch ports), and frequently the same cable congestion problems found in large matrix switches. In addition, converters would be required on all of the serial or parallel ports to make all signal interface formats the same upon entering the switch.
What is needed is a switching system capable of interconnecting a large number of electronic components in a manner which allows the components to function as if they were physically hard wired to one another. Preferably, the functional behavior of the switching system would be such that one device that uses virtually any type of data transfer protocol can be connected to any other device that uses that same data transfer protocol. Advantageously, the functional behavior of the switching system would be such that the switching system would exhibit low latency (achieving a total data transfer delay close to the latency associated with a direct-wired configuration), timing consistency (achieving a latency which is deterministic and predictable), and high signal fidelity (not adding to, deleting from, or altering the signal in any way). What is also needed is a switching system capable of handling multiple signal types up to 10 kilometers (km) apart under the verified control of a single controller.
Based on the above and foregoing, it can be appreciated that there presently exists a need in the art for a switching system which overcomes the above-described deficiencies. The present invention was motivated by a desire to overcome the drawbacks and shortcomings of the presently available technology, and thereby fulfill this need in the art.
Advantageously, the Multi-Interface Point-to-Point Switching System (MIPPSS) according to the present invention provides the ability to interconnect a large number of electronic components in a manner which allows the components to function as if they were physically wired, i.e., hard wired, together. It should be noted that while each of these qualities may already exist separately in other switching components, MIPPSS is the first switching system which advantageously combines all of these features and attendant advantages within a single design.
An object according to the present invention is to provide a switching system which correctly recognizes a plurality of different signal shapes while disregarding system noise.
Another object according to the present invention is to provide a switching system which accommodates a plurality of different digital encoding techniques.
Still another object according to the present invention is to provide a switching system designed to handle multiple interface types while operating at a bit, and not a word or character, level. Stated another way, the switching system according to the present invention makes no attempt to interpret a bit string; it simply passes the bit string along without modification. Thus, the switching system disregards different data formats or signal manipulations and simply transfers the signal to the appropriate destination as it is presented.
A still further object according to the present invention is to provide a switching system operating under an automated controller and using pre-established configuration definitions so as to permit re-alignment of the switching system in seconds rather than hours or days.
Yet another object according to the present invention is to a provide a switching system which avoids the problems of network or packet-switched systems including the processing delays, overhead, and timing inconsistencies associated with network protocols, while providing the high-fidelity, point-to-point data transfer required in many scientific and technical applications.
Another object according to the present invention is to provide a switching system which rapidly handles a large number of interface protocols, retains low latency which is deterministic and predictable, and maintains high signal fidelity, all within a manageable and budgetable envelope.
An object according to the present invention is to provide a switching system exhibiting multi-interface functional behavior. It should be noted that multi-interface functional behavior connotes that a device that uses virtually any type of data transfer protocol can be connected to any other device that uses that same data transfer protocol. Advantageously, MIPPSS is capable of simultaneously handling various parallel and serial signal formats, at different data rates and different voltage levels, and fiber optic signals. These signals can be of virtually any data type, i.e., communications, images, sensor data, accounting records, and can be used for any scientific, commercial, or military purpose. MIPPSS offers the advantage of using a single system operating under a single controller to provide all switching services for a given facility.
Another object according to the present invention is to provide a switching system exhibiting a data transfer speed approximating that of dedicated copper wire, i.e., a data transfer speed close to the speed which would have been achieved in a direct-wired configuration wherein the total point-to-point delays appear as a fixed length of cable. Stated another way, the switching system according to the present invention overcomes the disadvantages, i.e., inconsistent routing, inconsistent timing, and packet delays (or losses) associated with the overhead of operating a packet-switching network.
Still another object according to the present invention is to provide a switching system exhibiting timing consistency, i.e., a data transfer speed which is deterministic and predictable.
A further object according to the present invention is to provide a switching system exhibiting high signal fidelity, i.e., a switching system which does not add to, delete from, or alter the signal in any way, and/or transparency.
A still further object according to the present invention is to provide a switching system having a distributed design, i.e., each switching unit has the capability of servicing multiple locations and, thus, no single location houses the entire switch system.
A related object according to the present invention is to provide a switching system designed and implemented with standardized units or dimensions to thereby promote flexible use.
A still further object according to the present invention is to provide a switching system wherein the switch size can be increased or decreased in increments of two I/O pairs from a minimum size of two I/O pairs up to a maximum of N I/O pairs of any interface type, where N is a positive integer. Preferably, N is equal to 4096 in the exemplary embodiment discussed below, although N may be much greater than 4096.
Another object according to the present invention is to provide a switching system which automatically locates the quickest (lowest latency) available signaling path and establishes a point to point connection using that path.
An object according to the present invention is to provide a switching system exhibiting a high message throughput in addition to a high transfer speed of raw data. Preferably, the switching system achieves a high message throughput by taking advantage of local switching between adjacent components. A closely related object according to the present invention is to provide a switching system wherein once a transmission path has been established, that transmission path cannot be used to transmit any other signal for the duration of the connection. It should be mentioned that the switching system according to the present invention, by combining the characteristic of local switching and a dedicated path usage, i.e., a path once set stays set, permits messages to be transmitted efficiently without address interpretation required in other switching architectures.
A further object according to the present invention is to provide a switching system wherein each connection is verifiable. In particular, a given switch action advantageously can be validated by sending an electric pulse from the input port to the output port; if the signal is received at the intended output, the connection is valid.
Another object according to the present invention is to provide a switching system exhibiting path select ability, whereby any given path through the switch may be selected via software commands. Preferably, the switching system automatically chooses the switchable path that exhibits the lowest timing delay. As mentioned above, this path, once made, remains fixed until actively released. Advantageously, there are alternate paths that are software selectable.
Yet another object according to the present invention is to provide a switching system exhibiting a non-blocking characteristic, i.e., any signal input can be switched to any signal output. Stated another way, the architecture of the inventive switching system does not inhibit the switching action between the input and output ports.
Still another object according to the present invention is to provide a switching system exhibiting automated control and management functions, e.g, the inventive switching system will locate the quickest (lowest latency) available path and establish a point to point connection. When the first tested path is unavailable (in use or damaged), the system locates the next-lowest latency connection. Preferably, the switching system can also be remotely and rapidly configured/reconfigured under software control. Advantageously, the switching system can be programmed to perform initial, periodic, and on-demand Built-In Test(s) (BIT) to assess switching system function and localize failed components.
A still further object according to the present invention is to provide a switching system with the ability to replace (xe2x80x9chot swapxe2x80x9d) units, e.g., modules and/or cards, while the switching system is operating.
Moreover, an object according to the present invention is to provide a switching system employing Commercial Off The Shelf (COTS) hardware in redundant modular designs to the maximum extent possible.
These and other objects, features and advantages according to the present invention are provided by a multi-interface switching system, including a plurality of I/O ports coupled to a plurality of respective devices, a switching fabric, and a controller. Advantageously, the controller determines the path bit error rate for each all possible signal paths that are presently available, then selects the presently available one of the possible signal paths for each connection that has the lowest path bit error rate, and then configures the switching fabric to establish the selected signal path for each connection. According to the present invention, the switching fabric selectively delivers each of a plurality of different signals from a selected one of the I/O ports coupled to a sending one of the devices to another selected one of the I/O ports coupled to a receiving one of the devices, to thereby establish respective connections between the sending and receiving devices, wherein the switching fabric provides a fixed, low latency signal path for each connection, whereby the latency of that connection is deterministic and predictable, and a data content of the signal delivered via that connection is not analyzed by the switching fabric, whereby the switching fabric operates in a message-independent manner.
These and other objects, features and advantages according to the present invention are provided by a multi-interface switching system, including a plurality of I/O circuitry coupled to a plurality of respective devices, switching circuitry for selectively delivering each of a plurality of different signals from a selected one of the I/O circuitry coupled to a sending one of the devices to another selected one of the I/O circuitry coupled to a receiving one of the devices, to thereby establish respective connections between the sending and receiving devices, wherein the switching circuitry provides a fixed, low latency signal path for each connection, whereby the latency of that connection is deterministic and predictable, and a data content of the signal delivered via that connection is not analyzed by the switching circuitry, whereby the switching circuitry operates in a message-independent manner, and controller circuitry for determining the path bit error rate for each all possible signal paths that are presently available, for selecting the presently available one of the possible signal paths for each connection that has the lowest path bit error rate, and for then configuring the switching circuitry to establish the selected signal path for each connection.
These and other objects, features and advantages according to the present invention are provided by a multi-interface switching system, including a plurality of I/O circuitry coupled to a plurality of respective devices, switching circuitry for selectively delivering each of a plurality of different signals from a selected one of the I/O circuitry coupled to a sending one of the devices to another selected one of the I/O circuitry coupled to a receiving one of the devices, to thereby establish respective connections between the sending and receiving devices, wherein the switching fabric provides a fixed, low latency signal path for each connection, whereby the latency of that connection is deterministic and predictable, and a data content of the signal delivered via that connection is not analyzed by the switching fabric, whereby the switching fabric operates in a message-independent manner, and controller circuitry. Preferably, the controller circuitry determines the latency of all possible signal paths that are presently available for each connection to be established, determines the path bit error rate for each of the presently available possible signal paths, then selects the presently available one of the possible signal paths for each connection that satisfies an optimum combination of lowest latency and lowest path bit error rate in accordance with a prescribed algorithm, and then configures the switching fabric to establish the selected signal path for each connection.